Fet_Field Effect Transistors — Part 1 MCQs with Explanations

The gate voltage in a JFET at which the drain current becomes zero is called the cut-off voltage. Cut-off voltage is the gate-source voltage (V_GS) at which the JFET channel is completely pinched off, and the drain current (I_D) ceases. At this point, the JFET is in the off state, and no current flows from drain to source. Other terms like saturation, pinch-off, and active refer to different operating regions of the JFET, not the voltage at which the drain current is zero.

Think of a JFET (Junction Field-Effect Transistor) like a water tap. You use a small amount of effort (like turning the handle a little) to control a large flow of water. * Power Gain means how much bigger the output signal (like the water flow) is compared to the input signal (like turning the handle). *JFETs are excellent at amplifying signals. This means a tiny input signal can control a much larger output signal. *Because of this amplification, JFETs have a * very high power gain . They can take a small input signal and turn it into a much bigger output signal. *The other options are not correct: * Small or Very Small power gain would mean the JFET doesn't amplify well. * None of the above would mean JFETs don't have any power gain at all, which is incorrect.

pentode is the correct answer to “The output characteristics of a JFET closely resemble the output characteristics of a ___________ valve”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

pinch-off and breakdown is the correct answer to “The constant-current region of a JFET lies between”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

input is reverse biased is the correct answer to “A JFET has high input impedance because ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

the JFET has a pn junction is the correct answer to “A MOSFET differs from a JFET mainly because ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

is decreased is the correct answer to “If the reverse bias on the gate of a JFET is increased, then width of the conducting channel ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

is increased is the correct answer to “If the gate of a JFET is made less negative, the width of the conducting channel ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

is increased is the correct answer to “If the cross-sectional area of the channel in n-channel JEFT increases, the drain current ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

11.4 is the correct answer to “In a certain common source D-MOSFET amplifier, Vds =3.2 V r.m. and Vgs = 280 mV r.m.s. The voltage gain is ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

4.5 is the correct answer to “In a certain CS JFET amplifier, R D = 1 kΩ , R S = 560 Ω , V DD = 10 V and g m = 4500 µS. If the source resistor is completely bypassed, the voltage gain is ___________.”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

gate voltage is the correct answer to “The input control parameter of a JFET is ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

more than is the correct answer to “The input impedance of a JFET is ___________ that of an ordinary transistor”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

capacitor is the correct answer to “A MOSFET uses the electric field of a ___________ to control the channel current”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

source, gate, drain is the correct answer to “A JFET has three terminals, namely ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

cathode is the correct answer to “The source terminal of a JEFT corresponds to ___________ of a vacuum tube”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

voltage is the correct answer to “A JFET is a ___________ driven device”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

unipolar is the correct answer to “A JFET is also called ___________ transistor”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

common gate configuration is the correct answer to “A common base configuration of a pnp transistor is analogous to ___________ of a JFET”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

three is the correct answer to “A MOSFET has ___________ terminals”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

grid cut off is the correct answer to “The pinch-off voltage in a JFET is analogous to ___________ voltage in a vacuum tube”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

completely closed by the depletion region is the correct answer to “At cut-off, the JFET channel is ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

VP is the correct answer to “For VGS = 0 V, the drain current becomes constant when VDS exceeds”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

remains constant is the correct answer to “When drain voltage equals the pinch-off-voltage, then drain current ___________ with the increase in drain voltage”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

the enhancement-mode is the correct answer to “A n-channel D-MOSFET with a positive VGS is operating in ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

JFET is the correct answer to “___________ has the lowest noise-level”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

MOSFET is the correct answer to “Which of the following devices has the highest input impedance”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

0.5 to 30 mA/V is the correct answer to “The transconductance of a JFET ranges from ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

holes is the correct answer to “In a p-channel JFET, the charge carriers are ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

5 V is the correct answer to “The pinch-off voltage of a JFET is about ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

high input impedance and square-law property is the correct answer to “The two important advantages of a JFET are ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

drain to source current with gate shorted is the correct answer to “In a JFET, IDSS is known as ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

insulated gate is the correct answer to “A MOSFET is sometimes called ___________ JFET”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

180° out of phase with input is the correct answer to “In a common source JFET amplifier, the output voltage is ___________.”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

1.89 V is the correct answer to “A CS JFET amplifier has a load resistance of 10 kΩ , R D = 820 V. If g m = 5 mS and V in = 500 mV, the output signal voltage is”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

two is the correct answer to “In a FET, there are ___________ pn junctions at the sides”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

several MO is the correct answer to “The input impedance of a MOSFET is of the order of ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

the voltage gain will decrease is the correct answer to “A certain common source JFET has a voltage gain of 10. If the source bypass capacitor is removed, ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

20 mA is the correct answer to “A certain D-MOSFET is biased at VGS = 0 V. Its data sheet specifies IDSS = 20mA and VGS(off) = -5 V. The value of the drain current is ___________”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.

reverse is the correct answer to “The gate of a JFET is ___________ biased”. This question is standard in competitive examination syllabi for Fet_Field Effect Transistors.