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Digital Electronics — Part 2 MCQs with Explanations

Practice high-yield Electronics & Communications Engineering MCQs on Digital Electronics — Part 2 with worked academic solutions for FPSC, PPSC, PTA, PAEC, NTS.

Questions
40
Difficulty Level
Exam-Level
Target Exams
FPSC, PPSC, PTA...
Estimated Time
48 mins
Exam-Level FPSC PPSC PTA PAEC NTS
Verified for Commission Syllabus • Oct 14, 2026
40

Verified Practice Questions

Interactive test mode with detailed academic worked solutions

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Question 1 of 40
★ FPSC ★ PPSC

Match List-I with List-II and select the correct answer using the options given below the lists: List-I (Memory elements) List-II (Properties) a. Semiconductor 1. Destructive memory read out b. Ferrite core memory 2. Combinational logic c. Magnetic tape memory 3. Non-volatile

Question 2 of 40
★ FPSC ★ PPSC

The highest speed counter is

Question 3 of 40
★ FPSC ★ PPSC

The circuit shown in figure realizes the function:

Question 4 of 40
★ FPSC ★ PPSC

Given the decimal number -19, and eight bit two's complement representation is given by

Question 5 of 40
★ FPSC ★ PPSC

A DEMUX with an 8-bit select input has:

Question 6 of 40
★ FPSC ★ PPSC

If the output of a logic gate is '1' when all its inputs are at logic '0', the gate is either

Question 7 of 40
★ FPSC ★ PPSC

Which of the following flip-flop cannot be converted to D-type (delay) flip-flop

Question 8 of 40
★ FPSC ★ PPSC

Among the following types of A/D converters, name the one which the analog signal is sampled at a frequency much higher than the Nyquist rate

Question 9 of 40
★ FPSC ★ PPSC

The number of comparators carried out in a 5 bit flash type A/D converter is

Question 10 of 40
★ FPSC ★ PPSC

In the expression A(A + B) by writing the first term A as (A + 0), the expression is best simplified as

Question 11 of 40
★ FPSC ★ PPSC

In a 3-input CMOS NAND gate, the substrate terminals of NMOS transistors are grounded (lowest potential available in the circuit) and the substrate terminals of PMOS transistors are connected to V DD (maximum positive potential in the circuit). Which of the following transistors may suffer in this circuit from body bias effect?

Question 12 of 40
★ FPSC ★ PPSC

A 2-bit synchronous counter using two J-K flip flops is shown. The expressions for the inputs to the J-K flip flops are also shown in the figure. The output sequence of the counter starting from Q 1 Q 2 = 00 is

Question 13 of 40
★ FPSC ★ PPSC

Consider the following statements describing the property of a complementary MOS (CMOS) inverter: 1. It is a combination of an n-channel FET and a p-channel FET. 2. There is power dissipation when the input carriers the logical 1 signal. 3. There is no power dissipation when the input carries the logic 1 signal. 4. There is power dissipation during transition from 0 to 1 or from 1 to 0. Which of the statements given above are correct:

Question 14 of 40
★ FPSC ★ PPSC

For the Boolean expression $$\overline {\text{A}} {\text{BC}} + {\text{A}}\overline {\text{B}} {\text{C}} + {\text{AB}}\overline {\text{C}} {\text{,}}$$ how many 1's are in the output column of the truth table

Question 15 of 40
★ FPSC ★ PPSC

The Boolean expression for the output of the logic circuit shown in the figure is

Question 16 of 40
★ FPSC ★ PPSC

With the availability of 16 × 4 memory size, how many ICs (memory chips) will be required for the expansion of its word size in order to obtain 16 × 8 memory?

Question 17 of 40
★ FPSC ★ PPSC

An X-Y flip-flop, whose characteristic table is given below is to be implemented using J-K flip-flop. This can be done making X Y Q n+1 0 0 1 0 1 Q n 1 0 $${\overline {\text{Q}} _{\text{n}}}$$ 1 1 0

Question 18 of 40
★ FPSC ★ PPSC

The IC used for making a bidirectional universal shift register is-

Question 19 of 40
★ FPSC ★ PPSC

The output Y of the circuit shown below is

Question 20 of 40
★ FPSC ★ PPSC

Consider the bit pattern 01010001. Which of the following has Hamming distance of exactly 2 from these patterns?

Question 21 of 40
★ FPSC ★ PPSC

The 2's complement representation of (-541) 10 decimal in hexadecimal is:

Question 22 of 40
★ FPSC ★ PPSC

The number of flip-flop required to construct an 8-bit shift register will be

Question 23 of 40
★ FPSC ★ PPSC

Which of the following gates is also called 'all or nothing gate'?

Question 24 of 40
★ FPSC ★ PPSC

In TTL family, the Totem-pole circuit on the output is used to provide . . . . . . . .

Question 25 of 40
★ FPSC ★ PPSC

The expression X + $$\overline {\text{X}} $$ ⋅ Y is equal to

Question 26 of 40
★ FPSC ★ PPSC

The maximum positive and negative numbers which can be represented in 2's complement form using n-bit are

Question 27 of 40
★ FPSC ★ PPSC

The resolution of an-n-bit D/A converter with a maximum input of 5 V is 5 mV. The value of 'n' is

Question 28 of 40
★ FPSC ★ PPSC

In a decoder, if the input lines are 4 then number of maximum output lines will be:

Question 29 of 40
★ FPSC ★ PPSC

The disadvantage of an open shift register is that

Question 30 of 40
★ FPSC ★ PPSC

What is the minimized logic expression corresponding to the given Karnaugh Map?

Question 31 of 40
★ FPSC ★ PPSC

Match List-I with List-II and select the correct answer using the options given below the lists: List-I (Logic Gates) List-II (Power dissipation per gate in mW) a. DTL 1. 55 b. TTL 2. 10 c. ECL 3. 8 d. MOS 4. 1 5. 40

Question 32 of 40
★ FPSC ★ PPSC

How many flip flops are required to construct a MOD-128 counter? What is the largest decimal number that can be stored in a MOD-64 counter?

Question 33 of 40
★ FPSC ★ PPSC

(100101) 2 is equal to decimal number

Question 34 of 40
★ FPSC ★ PPSC

In . . . . . . . ., the flip flop output transition serves as a source for triggering other flip-flops.

Question 35 of 40
★ FPSC ★ PPSC

The following circuit represents which logic?

Question 36 of 40
★ FPSC ★ PPSC

A counter is designed with six stages of flip flops. Determine the output frequency at the last (sixth) stage, when input frequency is 1 MHz.

Question 37 of 40
★ FPSC ★ PPSC

Silicon dioxide is used in Ics

Question 38 of 40
★ FPSC ★ PPSC

Match List-I with List-II and select the correct answer using the options given below the list: List-I List-II a. TTL 1. Low power consumption b. ECL 2. High speed c. CMOS 3. Low propagation delay

Question 39 of 40
★ FPSC ★ PPSC

Which of the following circuit exhibits memory?

Question 40 of 40
★ FPSC ★ PPSC

Consider the multiplexer based logic circuit shown in the figure Which one of the following Boolean functions is realized by the circuit?

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💡 Examiner's Advisory for Electronics & Communications Engineering

In competitive commission exams (FPSC, PPSC, KPPSC, SPSC, CSS, PMS), questions are frequently phrased with distractor options designed to catch rote learners. Whenever you answer an MCQ, read the Detailed Academic Explanation and Conceptual Anchor to understand why the remaining options are incorrect.

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