Digital Electronics — Part 2 MCQs with Explanations
Practice high-yield Electronics & Communications Engineering MCQs on Digital Electronics — Part 2 with worked academic solutions for FPSC, PPSC, PTA, PAEC, NTS.
Questions
40
Difficulty Level
Exam-Level
Target Exams
FPSC, PPSC, PTA...
Estimated Time
48 mins
Exam-Level FPSC PPSC PTA PAEC NTS
Verified for Commission Syllabus • Oct 14, 2026
40
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Question 1 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Match List-I with List-II and select the correct answer using the options given below the lists: List-I (Memory elements) List-II (Properties) a. Semiconductor 1. Destructive memory read out b. Ferrite core memory 2. Combinational logic c. Magnetic tape memory 3. Non-volatile
Correct Answer: Option A — a-2, b-1, c-3
Detailed Academic Explanation:
a-2, b-1, c-3 is the correct answer to “Match List-I with List-II and select the correct answer using the options given below the lists: List-I (Memory elements) List-II (Properties) a. Semiconductor 1. Destructive memory read out b. Ferrite core memory 2. Combinational logic c. Magnetic tape memory 3. Non-volatile”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 2 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The highest speed counter is
Correct Answer: Option B — Synchronous counter
Detailed Academic Explanation:
Synchronous counter is the correct answer to “The highest speed counter is”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 3 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The circuit shown in figure realizes the function:
$$\left( {\overline {{\text{A}} + {\text{B}}} + {\text{C}}} \right)\left( {\overline {\text{D}} \overline {\text{E}} } \right)$$ is the correct answer to “The circuit shown in figure realizes the function:”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 4 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Given the decimal number -19, and eight bit two's complement representation is given by
Correct Answer: Option B — 11101101
Detailed Academic Explanation:
11101101 is the correct answer to “Given the decimal number -19, and eight bit two's complement representation is given by”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 5 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
A DEMUX with an 8-bit select input has:
Correct Answer: Option A — one data input and 256 data outputs
Detailed Academic Explanation:
one data input and 256 data outputs is the correct answer to “A DEMUX with an 8-bit select input has:”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 6 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
If the output of a logic gate is '1' when all its inputs are at logic '0', the gate is either
Correct Answer: Option A — a NAND or NOR
Detailed Academic Explanation:
a NAND or NOR is the correct answer to “If the output of a logic gate is '1' when all its inputs are at logic '0', the gate is either”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 7 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Which of the following flip-flop cannot be converted to D-type (delay) flip-flop
Correct Answer: Option D — None of the above
Detailed Academic Explanation:
None of the above is the correct answer to “Which of the following flip-flop cannot be converted to D-type (delay) flip-flop”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 8 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Among the following types of A/D converters, name the one which the analog signal is sampled at a frequency much higher than the Nyquist rate
Correct Answer: Option C — Half-flash A/D converter
Detailed Academic Explanation:
Half-flash A/D converter is the correct answer to “Among the following types of A/D converters, name the one which the analog signal is sampled at a frequency much higher than the Nyquist rate”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 9 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The number of comparators carried out in a 5 bit flash type A/D converter is
Correct Answer: Option A — 31
Detailed Academic Explanation:
31 is the correct answer to “The number of comparators carried out in a 5 bit flash type A/D converter is”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 10 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
In the expression A(A + B) by writing the first term A as (A + 0), the expression is best simplified as
Correct Answer: Option C — A
Detailed Academic Explanation:
A is the correct answer to “In the expression A(A + B) by writing the first term A as (A + 0), the expression is best simplified as”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 11 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
In a 3-input CMOS NAND gate, the substrate terminals of NMOS transistors are grounded (lowest potential available in the circuit) and the substrate terminals of PMOS transistors are connected to V DD (maximum positive potential in the circuit). Which of the following transistors may suffer in this circuit from body bias effect?
Correct Answer: Option A — 2 NMOS transistors
Detailed Academic Explanation:
2 NMOS transistors is the correct answer to “In a 3-input CMOS NAND gate, the substrate terminals of NMOS transistors are grounded (lowest potential available in the circuit) and the substrate terminals of PMOS transistors are connected to V DD (maximum positive potential in the circuit). Which of the following transistors may suffer in this circuit from body bias effect”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 12 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
A 2-bit synchronous counter using two J-K flip flops is shown. The expressions for the inputs to the J-K flip flops are also shown in the figure. The output sequence of the counter starting from Q 1 Q 2 = 00 is
00 → 01 → 11 → 10 → 00 . . . . is the correct answer to “A 2-bit synchronous counter using two J-K flip flops is shown. The expressions for the inputs to the J-K flip flops are also shown in the figure. The output sequence of the counter starting from Q 1 Q 2 = 00 is”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 13 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Consider the following statements describing the property of a complementary MOS (CMOS) inverter: 1. It is a combination of an n-channel FET and a p-channel FET. 2. There is power dissipation when the input carriers the logical 1 signal. 3. There is no power dissipation when the input carries the logic 1 signal. 4. There is power dissipation during transition from 0 to 1 or from 1 to 0. Which of the statements given above are correct:
Correct Answer: Option D — 1, 2 and 4
Detailed Academic Explanation:
1, 2 and 4 is the correct answer to “Consider the following statements describing the property of a complementary MOS (CMOS) inverter: 1. It is a combination of an n-channel FET and a p-channel FET. 2. There is power dissipation when the input carriers the logical 1 signal. 3. There is no power dissipation when the input carries the logic 1 signal. 4. There is power dissipation during transition from 0 to 1 or from 1 to 0. Which of the statements given above are correct:”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 14 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
For the Boolean expression $$\overline {\text{A}} {\text{BC}} + {\text{A}}\overline {\text{B}} {\text{C}} + {\text{AB}}\overline {\text{C}} {\text{,}}$$ how many 1's are in the output column of the truth table
Correct Answer: Option B — 3
Detailed Academic Explanation:
3 is the correct answer to “For the Boolean expression $$\overline {\text{A}} {\text{BC}} + {\text{A}}\overline {\text{B}} {\text{C}} + {\text{AB}}\overline {\text{C}} {\text{,}}$$ how many 1's are in the output column of the truth table”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 15 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The Boolean expression for the output of the logic circuit shown in the figure is
$${\text{Y}} = \overline {\text{A}} \overline {\text{B}} + {\text{AB}} + \overline {\text{C}} $$ is the correct answer to “The Boolean expression for the output of the logic circuit shown in the figure is”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 16 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
With the availability of 16 × 4 memory size, how many ICs (memory chips) will be required for the expansion of its word size in order to obtain 16 × 8 memory?
Correct Answer: Option A — 2
Detailed Academic Explanation:
2 is the correct answer to “With the availability of 16 × 4 memory size, how many ICs (memory chips) will be required for the expansion of its word size in order to obtain 16 × 8 memory”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 17 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
An X-Y flip-flop, whose characteristic table is given below is to be implemented using J-K flip-flop. This can be done making X Y Q n+1 0 0 1 0 1 Q n 1 0 $${\overline {\text{Q}} _{\text{n}}}$$ 1 1 0
$${\text{J}} = \overline {\text{Y}} {\text{, K}} = {\text{X}}$$ is the correct answer to “An X-Y flip-flop, whose characteristic table is given below is to be implemented using J-K flip-flop. This can be done making X Y Q n+1 0 0 1 0 1 Q n 1 0 $${\overline {\text{Q}} _{\text{n}}}$$ 1 1 0”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 18 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The IC used for making a bidirectional universal shift register is-
Correct Answer: Option C — 74194
Detailed Academic Explanation:
74194 is the correct answer to “The IC used for making a bidirectional universal shift register is-”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 19 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The output Y of the circuit shown below is
Correct Answer: Option B — $${\overline {\text{X}} }$$
Detailed Academic Explanation:
$${\overline {\text{X}} }$$ is the correct answer to “The output Y of the circuit shown below is”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 20 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Consider the bit pattern 01010001. Which of the following has Hamming distance of exactly 2 from these patterns?
Correct Answer: Option B — 01010010
Detailed Academic Explanation:
01010010 is the correct answer to “Consider the bit pattern 01010001. Which of the following has Hamming distance of exactly 2 from these patterns”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 21 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The 2's complement representation of (-541) 10 decimal in hexadecimal is:
Correct Answer: Option D — DE3
Detailed Academic Explanation:
DE3 is the correct answer to “The 2's complement representation of (-541) 10 decimal in hexadecimal is:”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 22 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The number of flip-flop required to construct an 8-bit shift register will be
Correct Answer: Option C — 8
Detailed Academic Explanation:
8 is the correct answer to “The number of flip-flop required to construct an 8-bit shift register will be”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 23 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Which of the following gates is also called 'all or nothing gate'?
Correct Answer: Option A — AND
Detailed Academic Explanation:
AND is the correct answer to “Which of the following gates is also called 'all or nothing gate'”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 24 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
In TTL family, the Totem-pole circuit on the output is used to provide . . . . . . . .
Correct Answer: Option A — Active pull up and active pull down
Detailed Academic Explanation:
Active pull up and active pull down is the correct answer to “In TTL family, the Totem-pole circuit on the output is used to provide . . . . . . . .”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 25 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The expression X + $$\overline {\text{X}} $$ ⋅ Y is equal to
Correct Answer: Option C — X + Y
Detailed Academic Explanation:
X + Y is the correct answer to “The expression X + $$\overline {\text{X}} $$ ⋅ Y is equal to”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 26 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The maximum positive and negative numbers which can be represented in 2's complement form using n-bit are
Correct Answer: Option B — +(2n - 1 - 1), -2n - 1
Detailed Academic Explanation:
+(2n - 1 - 1), -2n - 1 is the correct answer to “The maximum positive and negative numbers which can be represented in 2's complement form using n-bit are”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 27 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The resolution of an-n-bit D/A converter with a maximum input of 5 V is 5 mV. The value of 'n' is
Correct Answer: Option C — 10
Detailed Academic Explanation:
10 is the correct answer to “The resolution of an-n-bit D/A converter with a maximum input of 5 V is 5 mV. The value of 'n' is”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 28 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
In a decoder, if the input lines are 4 then number of maximum output lines will be:
Correct Answer: Option B — 16
Detailed Academic Explanation:
16 is the correct answer to “In a decoder, if the input lines are 4 then number of maximum output lines will be:”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 29 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The disadvantage of an open shift register is that
Correct Answer: Option A — Both shift left and shift right operations can not be performed
Detailed Academic Explanation:
Both shift left and shift right operations can not be performed is the correct answer to “The disadvantage of an open shift register is that”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 30 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
What is the minimized logic expression corresponding to the given Karnaugh Map?
$$\overline {\text{w}} {\text{x}}\overline {\text{y}} + \overline {\text{w}} {\text{yz}} + {\text{w}}\overline {\text{y}} {\text{z}} + {\text{wxy}}$$ is the correct answer to “What is the minimized logic expression corresponding to the given Karnaugh Map”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 31 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Match List-I with List-II and select the correct answer using the options given below the lists: List-I (Logic Gates) List-II (Power dissipation per gate in mW) a. DTL 1. 55 b. TTL 2. 10 c. ECL 3. 8 d. MOS 4. 1 5. 40
Correct Answer: Option C — a-3, b-2, c-5, d-4
Detailed Academic Explanation:
a-3, b-2, c-5, d-4 is the correct answer to “Match List-I with List-II and select the correct answer using the options given below the lists: List-I (Logic Gates) List-II (Power dissipation per gate in mW) a. DTL 1. 55 b. TTL 2. 10 c. ECL 3. 8 d. MOS 4. 1 5. 40”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 32 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
How many flip flops are required to construct a MOD-128 counter? What is the largest decimal number that can be stored in a MOD-64 counter?
Correct Answer: Option A — Seven flip flops, largest decimal number is 63
Detailed Academic Explanation:
Seven flip flops, largest decimal number is 63 is the correct answer to “How many flip flops are required to construct a MOD-128 counter? What is the largest decimal number that can be stored in a MOD-64 counter”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 33 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
(100101) 2 is equal to decimal number
Correct Answer: Option B — 37
Detailed Academic Explanation:
37 is the correct answer to “(100101) 2 is equal to decimal number”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 34 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
In . . . . . . . ., the flip flop output transition serves as a source for triggering other flip-flops.
Correct Answer: Option A — Ripple counter
Detailed Academic Explanation:
Ripple counter is the correct answer to “In . . . . . . . ., the flip flop output transition serves as a source for triggering other flip-flops.”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 35 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The following circuit represents which logic?
Correct Answer: Option C — Nor
Detailed Academic Explanation:
Nor is the correct answer to “The following circuit represents which logic”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 36 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
A counter is designed with six stages of flip flops. Determine the output frequency at the last (sixth) stage, when input frequency is 1 MHz.
Correct Answer: Option C — 15.625 KHz
Detailed Academic Explanation:
15.625 KHz is the correct answer to “A counter is designed with six stages of flip flops. Determine the output frequency at the last (sixth) stage, when input frequency is 1 MHz.”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 37 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Silicon dioxide is used in Ics
Correct Answer: Option C — To control the location of diffusion and to protect and insulate the Si Surface
Detailed Academic Explanation:
To control the location of diffusion and to protect and insulate the Si Surface is the correct answer to “Silicon dioxide is used in Ics”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 38 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Match List-I with List-II and select the correct answer using the options given below the list: List-I List-II a. TTL 1. Low power consumption b. ECL 2. High speed c. CMOS 3. Low propagation delay
Correct Answer: Option B — a-2, b-3, c-1
Detailed Academic Explanation:
a-2, b-3, c-1 is the correct answer to “Match List-I with List-II and select the correct answer using the options given below the list: List-I List-II a. TTL 1. Low power consumption b. ECL 2. High speed c. CMOS 3. Low propagation delay”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 39 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Which of the following circuit exhibits memory?
Correct Answer: Option B — Bistable multivibrator
Detailed Academic Explanation:
Bistable multivibrator is the correct answer to “Which of the following circuit exhibits memory”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
Question 40 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Consider the multiplexer based logic circuit shown in the figure Which one of the following Boolean functions is realized by the circuit?
$${\text{F}} = {\text{W}} \oplus {{\text{S}}_1} \oplus {{\text{S}}_2}$$ is the correct answer to “Consider the multiplexer based logic circuit shown in the figure Which one of the following Boolean functions is realized by the circuit”. This question is standard in competitive examination syllabi for Digital Electronics.
💡Key Conceptual Anchor:Digital Electronics
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Analog Electronics — Part 1
Master the next curriculum module with 40 exam-standard MCQs.
💡Examiner's Advisory for Electronics & Communications Engineering
In competitive commission exams (FPSC, PPSC, KPPSC, SPSC, CSS, PMS), questions are frequently phrased with distractor options designed to catch rote learners. Whenever you answer an MCQ, read the Detailed Academic Explanation and Conceptual Anchor to understand why the remaining options are incorrect.