Microprocessors And Microcontrollers — Part 2 MCQs with Explanations
Practice high-yield Electronics & Communications Engineering MCQs on Microprocessors And Microcontrollers — Part 2 with worked academic solutions for FPSC, PPSC, PTA, PAEC, NTS.
Questions
40
Difficulty Level
Exam-Level
Target Exams
FPSC, PPSC, PTA...
Estimated Time
48 mins
Exam-Level FPSC PPSC PTA PAEC NTS
Verified for Commission Syllabus • Oct 14, 2026
40
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Interactive test mode with detailed academic worked solutions
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Question 1 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
IC 7485 cannot be cascadeD.
Correct Answer: Option B — False
Detailed Academic Explanation:
False is the correct answer to “IC 7485 cannot be cascadeD.”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 2 of 40
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★ PPSC
★ FPSC
★ PPSC
‘Burst refresh’ in DRAM is also called
Correct Answer: Option A — Concentrated refresh
Detailed Academic Explanation:
Concentrated refresh is the correct answer to “‘Burst refresh’ in DRAM is also called”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 3 of 40
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When .9432 E – 4 is subtracted from .5452 E – 3 in normalized floating point mode
Correct Answer: Option B — .9432 E – 4 is changed to .09432 E – 3 and .5452 E – 3 is not changed
Detailed Academic Explanation:
.9432 E – 4 is changed to .09432 E – 3 and .5452 E – 3 is not changed is the correct answer to “When .9432 E – 4 is subtracted from .5452 E – 3 in normalized floating point mode”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 4 of 40
★ FPSC
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★ FPSC
★ PPSC
In 8085, the pins for SID and SOD are
Correct Answer: Option B — 5 and 4 respectively
Detailed Academic Explanation:
5 and 4 respectively is the correct answer to “In 8085, the pins for SID and SOD are”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 5 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
An Input/Output processor controls the flow of information between
Correct Answer: Option B — Main memory and Input/Output devices
Detailed Academic Explanation:
Main memory and Input/Output devices is the correct answer to “An Input/Output processor controls the flow of information between”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 6 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
MS Access is a DBMS software.
Correct Answer: Option A — True
Detailed Academic Explanation:
True is the correct answer to “MS Access is a DBMS software.”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 7 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Which of the following is not a general purpose peripheral?
Correct Answer: Option C — Programmable CRT controller
Detailed Academic Explanation:
Programmable CRT controller is the correct answer to “Which of the following is not a general purpose peripheral”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 8 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
In Fortran 77 a variable name can contain special characters.
Correct Answer: Option B — False
Detailed Academic Explanation:
False is the correct answer to “In Fortran 77 a variable name can contain special characters.”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 9 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
It is possible to copy a file in the same directory.
Correct Answer: Option A — True
Detailed Academic Explanation:
True is the correct answer to “It is possible to copy a file in the same directory.”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 10 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
What is the addressing mode used in instruction MOV M, C?
Correct Answer: Option B — Indirect
Detailed Academic Explanation:
Indirect is the correct answer to “What is the addressing mode used in instruction MOV M, C”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 11 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
In microprocessor's stack, what does the operation push cx means?
Ch = [sp - 1], cl = [sp - 2] and sp = sp - 2 is the correct answer to “In microprocessor's stack, what does the operation push cx means”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 12 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
How many bits are used as conditional flags in the flag register of 8086?
Correct Answer: Option D — 6
Detailed Academic Explanation:
6 is the correct answer to “How many bits are used as conditional flags in the flag register of 8086”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 13 of 40
★ FPSC
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★ FPSC
★ PPSC
If B 7 and B 6 bits of mode register in 8237 are set to 11, which mode of operation is selected?
Correct Answer: Option A — Cascade mode
Detailed Academic Explanation:
Cascade mode is the correct answer to “If B 7 and B 6 bits of mode register in 8237 are set to 11, which mode of operation is selected”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 14 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The address bus of Intel 8085 is 16-bit wide and hence the memory which can be accessed by this address bus is
Correct Answer: Option D — 64 k bytes
Detailed Academic Explanation:
64 k bytes is the correct answer to “The address bus of Intel 8085 is 16-bit wide and hence the memory which can be accessed by this address bus is”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 15 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
What is the size(in bits) of the stack pointer in 8085?
Correct Answer: Option D — 16
Detailed Academic Explanation:
16 is the correct answer to “What is the size(in bits) of the stack pointer in 8085”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 16 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Interrupt latency is the time elapsed between:
Correct Answer: Option B — Assertion of an interrupt and the start of the associated ISR
Detailed Academic Explanation:
Assertion of an interrupt and the start of the associated ISR is the correct answer to “Interrupt latency is the time elapsed between:”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 17 of 40
★ FPSC
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★ FPSC
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1. Program Counter (PC) Pushed to Stack 2. Generate LCALL to ISR 3. Complete Execution of instruction in progress 4. Clear the interrupt flag 5. Set interrupt in progress Correct order of execution of action taken by 8051 micro-controllers when an interrupt occurs:
Correct Answer: Option A — 3, 1, 4, 5, 2
Detailed Academic Explanation:
3, 1, 4, 5, 2 is the correct answer to “1. Program Counter (PC) Pushed to Stack 2. Generate LCALL to ISR 3. Complete Execution of instruction in progress 4. Clear the interrupt flag 5. Set interrupt in progress Correct order of execution of action taken by 8051 micro-controllers when an interrupt occurs:”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 18 of 40
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★ FPSC
★ PPSC
Which of the 8086 instruction can be used to fetch a string of 16-bit word stored in memory, automatically incrementing the memory pointer?
Correct Answer: Option B — LODSW with the direction flag reset
Detailed Academic Explanation:
LODSW with the direction flag reset is the correct answer to “Which of the 8086 instruction can be used to fetch a string of 16-bit word stored in memory, automatically incrementing the memory pointer”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 19 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Which of the following are two most commonly used industry standards for interchip serial communications?
Correct Answer: Option C — I2C & SPI
Detailed Academic Explanation:
I2C & SPI is the correct answer to “Which of the following are two most commonly used industry standards for interchip serial communications”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 20 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Consider the following instruction of 8085 µP. 1. MOV M, A 2. ADD C 3. MVI A, FF 4. CMP M Which of these cause change in the status of flag(s)?
Correct Answer: Option D — 2 and 4
Detailed Academic Explanation:
2 and 4 is the correct answer to “Consider the following instruction of 8085 µP. 1. MOV M, A 2. ADD C 3. MVI A, FF 4. CMP M Which of these cause change in the status of flag(s)”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 21 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
What is the total external data memory that can be interfaced to the 8051?
Correct Answer: Option A — 64 K
Detailed Academic Explanation:
64 K is the correct answer to “What is the total external data memory that can be interfaced to the 8051”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 22 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Considering figure 1, if SI = 1000H, the content of register AH after the instruction MOV AH, [SI] of 8086 µp will be
Correct Answer: Option A — 1000
Detailed Academic Explanation:
1000 is the correct answer to “Considering figure 1, if SI = 1000H, the content of register AH after the instruction MOV AH, [SI] of 8086 µp will be”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 23 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
In a computer, set of electrical paths which is used to transfer data is called
Correct Answer: Option C — Bus
Detailed Academic Explanation:
Bus is the correct answer to “In a computer, set of electrical paths which is used to transfer data is called”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 24 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Address bus of 8086 contains
Correct Answer: Option A — 20 lines
Detailed Academic Explanation:
20 lines is the correct answer to “Address bus of 8086 contains”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 25 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
An 8-bit microprocessor has the typical two way connected buffered lines which are called:
Correct Answer: Option B — Data bus
Detailed Academic Explanation:
Data bus is the correct answer to “An 8-bit microprocessor has the typical two way connected buffered lines which are called:”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 26 of 40
★ FPSC
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★ FPSC
★ PPSC
Consider the following statements: The 8259A Programmable Interrupt Controller can 1. manage eight interrupts 2. vector an interrupt request anywhere in the memory map 3. have 8-bit or 16-bit interval between interrupt vector locations 4. be initialized with operational command words Which of the above statements are correct?
Correct Answer: Option B — 1, 2 and 4 only
Detailed Academic Explanation:
1, 2 and 4 only is the correct answer to “Consider the following statements: The 8259A Programmable Interrupt Controller can 1. manage eight interrupts 2. vector an interrupt request anywhere in the memory map 3. have 8-bit or 16-bit interval between interrupt vector locations 4. be initialized with operational command words Which of the above statements are correct”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 27 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
A controller that takes control of the buses and transfers data directly between source and destination bypassing the microprocessor is known as
Correct Answer: Option A — DMA controller
Detailed Academic Explanation:
DMA controller is the correct answer to “A controller that takes control of the buses and transfers data directly between source and destination bypassing the microprocessor is known as”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 28 of 40
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★ FPSC
★ PPSC
In a 8051 microcontroller, PCON register controls the baud rate in: 1. Synchronous transmission 2. Asynchronous transmission
Correct Answer: Option B — 2 only
Detailed Academic Explanation:
2 only is the correct answer to “In a 8051 microcontroller, PCON register controls the baud rate in: 1. Synchronous transmission 2. Asynchronous transmission”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 29 of 40
★ FPSC
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★ FPSC
★ PPSC
In 8051 family instructions, which one of the following option is true?
Correct Answer: Option A — An opcode is one byte long for each instruction
Detailed Academic Explanation:
An opcode is one byte long for each instruction is the correct answer to “In 8051 family instructions, which one of the following option is true”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 30 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
If the operating frequency of an 8086 microprocessor is 10 MHz and, if for the given instruction, the machine cycle consists of 4 T-states, what will be the time taken by the machine cycle to complete the execution of that machine cycle to complete the execution of that same instruction when three wait states are inserted?
Correct Answer: Option B — 0.7 µs
Detailed Academic Explanation:
0.7 µs is the correct answer to “If the operating frequency of an 8086 microprocessor is 10 MHz and, if for the given instruction, the machine cycle consists of 4 T-states, what will be the time taken by the machine cycle to complete the execution of that machine cycle to complete the execution of that same instruction when three wait states are inserted”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 31 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
A stake machine pushes operands on a stack and evaluates binary operators by a pcs (i.e pop/compute/store) where the top two operands are popped computation is performed and the result is pushed onto stack. Evaluation of an expression (x*y)+ (u*v) by Reverse Polish notation in a stack machine needs
Correct Answer: Option A — 4 push and 3 pcs instruction
Detailed Academic Explanation:
4 push and 3 pcs instruction is the correct answer to “A stake machine pushes operands on a stack and evaluates binary operators by a pcs (i.e pop/compute/store) where the top two operands are popped computation is performed and the result is pushed onto stack. Evaluation of an expression (x*y)+ (u*v) by Reverse Polish notation in a stack machine needs”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 32 of 40
★ FPSC
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★ FPSC
★ PPSC
The first machine cycle of an instruction is always
Correct Answer: Option B — A fetch cycle
Detailed Academic Explanation:
A fetch cycle is the correct answer to “The first machine cycle of an instruction is always”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 33 of 40
★ FPSC
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★ FPSC
★ PPSC
A CDMA system requires $$\frac{{{{\text{E}}_{\text{b}}}}}{{{{\text{I}}_0}}}$$ of 10 dB. Each of the transmitters in the network transmits data at the rate of 1 Kbps with a PN chip rate of 1 Mbps. The maximum number of such users that the network can support is:
Correct Answer: Option D — 100
Detailed Academic Explanation:
100 is the correct answer to “A CDMA system requires $$\frac{{{{\text{E}}_{\text{b}}}}}{{{{\text{I}}_0}}}$$ of 10 dB. Each of the transmitters in the network transmits data at the rate of 1 Kbps with a PN chip rate of 1 Mbps. The maximum number of such users that the network can support is:”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 34 of 40
★ FPSC
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If instruction RST 5 is written in a program the problem will jump to location
Correct Answer: Option C — 0028 H
Detailed Academic Explanation:
0028 H is the correct answer to “If instruction RST 5 is written in a program the problem will jump to location”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 35 of 40
★ FPSC
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In case the code is position dependent, the most suitable addressing mode is
Correct Answer: Option C — Relative mode
Detailed Academic Explanation:
Relative mode is the correct answer to “In case the code is position dependent, the most suitable addressing mode is”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 36 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The number of pins in microprocessor 8086 is
Correct Answer: Option B — 40
Detailed Academic Explanation:
40 is the correct answer to “The number of pins in microprocessor 8086 is”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 37 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Which one of the following pairs of 8086 microprocessor's interrupt is not correctly matched?
Correct Answer: Option C — INT 2 ⟺ Break point
Detailed Academic Explanation:
INT 2 ⟺ Break point is the correct answer to “Which one of the following pairs of 8086 microprocessor's interrupt is not correctly matched”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 38 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Which instruction of 8051 microcontroller is used for reading data from code memory?
Correct Answer: Option B — MOVC
Detailed Academic Explanation:
MOVC is the correct answer to “Which instruction of 8051 microcontroller is used for reading data from code memory”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 39 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
The following instructions have been executed by an 8085 microprocessor ADDRESS (HEX) INSTRUCTION 6010 LXI H, 8A79H 6013 MOV A, L 6014 ADD H 6015 DAA 6016 MOV H, A 6017 PCHL From which address will the next instruction be fetched?
Correct Answer: Option C — 6979
Detailed Academic Explanation:
6979 is the correct answer to “The following instructions have been executed by an 8085 microprocessor ADDRESS (HEX) INSTRUCTION 6010 LXI H, 8A79H 6013 MOV A, L 6014 ADD H 6015 DAA 6016 MOV H, A 6017 PCHL From which address will the next instruction be fetched”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
Question 40 of 40
★ FPSC
★ PPSC
★ FPSC
★ PPSC
Which of the following interrupts is unmaskable interrupts
Correct Answer: Option C — TRAP
Detailed Academic Explanation:
TRAP is the correct answer to “Which of the following interrupts is unmaskable interrupts”. This question is standard in competitive examination syllabi for Microprocessors And Microcontrollers.
💡Key Conceptual Anchor:Microprocessors And Microcontrollers
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Analog Electronics — Part 1
Master the next curriculum module with 40 exam-standard MCQs.
💡Examiner's Advisory for Electronics & Communications Engineering
In competitive commission exams (FPSC, PPSC, KPPSC, SPSC, CSS, PMS), questions are frequently phrased with distractor options designed to catch rote learners. Whenever you answer an MCQ, read the Detailed Academic Explanation and Conceptual Anchor to understand why the remaining options are incorrect.